Maximilian Eibl e2ef356f15 first commit		2025-02-10 20:28:13 +01:00
..
.gitignore	first commit	2025-02-10 20:28:13 +01:00
18_RAM_Example.vhdpproj	first commit	2025-02-10 20:28:13 +01:00
clkgen.vhd	first commit	2025-02-10 20:28:13 +01:00
design.vhd	first commit	2025-02-10 20:28:13 +01:00
testbench.vhd	first commit	2025-02-10 20:28:13 +01:00
vhdl_ls.toml	first commit	2025-02-10 20:28:13 +01:00