TU-VHDL/Task5/Task5.vhdpproj
2025-02-10 20:28:13 +01:00

7 lines
140 B
Plaintext

<Project>
<ItemGroup>
<File Include="RAM.vhdl" />
<File Include="RAM_beh.vhdl" />
</ItemGroup>
<PropertyGroup />
</Project>