library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

architecture behavior of demux is
    
    CONSTANT O1 : std_logic_vector(0 to 2)     := "000";
    CONSTANT O2 : std_logic_vector(0 to 2)     := "001";
    CONSTANT O3 : std_logic_vector(0 to 2)     := "010";
    CONSTANT O4 : std_logic_vector(0 to 2)     := "011";
    CONSTANT O5 : std_logic_vector(0 to 2)     := "100";
    CONSTANT OE : std_logic_vector(0 to 3)     := "0000";
    
begin
    process(SEL, IN1)
    begin
        case SEL is
            when O1 =>
                OUT1 <= IN1;
                OUT2 <= OE;
                OUT3 <= OE;
                OUT4 <= OE;
                OUT5 <= OE;
            when O2 =>
                OUT1 <= OE;
                OUT2 <= IN1;
                OUT3 <= OE;
                OUT4 <= OE;
                OUT5 <= OE;
            when O3 =>   OUT3 <= IN1;
                OUT1 <= OE;
                OUT2 <= OE;
                OUT3 <= IN1;
                OUT4 <= OE;
                OUT5 <= OE;
            when O4 =>   OUT4 <= IN1;
                OUT1 <= OE;
                OUT2 <= OE;
                OUT3 <= OE;
                OUT4 <= IN1;
                OUT5 <= OE;
            when O5 =>   OUT5 <= IN1;
                OUT1 <= OE;
                OUT2 <= OE;
                OUT3 <= OE;
                OUT4 <= OE;
                OUT5 <= IN1;
            when others =>
                OUT1 <= OE;
                OUT2 <= OE;
                OUT3 <= OE;
                OUT4 <= OE;
                OUT5 <= OE;
        end case;
    end process;
end behavior;